The 3DIC Compiler platform is a complete, end-to-end solution for efficient 2.5/3D multi-die design and full system integration. "This joint effort combining Synopsys' 3DIC Compiler platform and TSMC's chip stacking and advanced packaging technologies will help our customers meet design requirements on power and performance and achieve success in leading-edge SoC designs for HPC applications." "TSMC works closely with our Open Innovation Platform ® (OIP) ecosystem partners to enable the next wave of innovation in the HPC space," said Suk Lee, vice president of the Design Infrastructure Management Division at TSMC. The coalescence of support for these advanced methodologies in the 3DIC Compiler platform's highly integrated, multi-die design addresses the complete exploration-to-signoff challenge, driving the future realization of next-generation hyper-convergent 3D systems comprising hundreds of billions of transistors in a single package. These methodologies deliver 3D chip-stacking support in the System-on-Integrated-Chips (TSMC-SoIC ™) technology and 2.5/3D advanced packaging support in Integrated Fan-Out (InFO) and Chip-on-Wafer-on-Substrate (CoWoS ®) technologies. By leveraging Synopsys' 3DIC Compiler platform, customers significantly advance high-capacity 3D system design through efficient access to TSMC 3DFabric ™-based design methodologies. ![]() ![]() (Nasdaq: SNPS) today announced it has expanded its strategic technology collaboration with TSMC to deliver the next level in system integration to address the increasingly critical performance, power and area targets for high-performance computing (HPC) applications. Synopsys' 3DIC Compiler Delivers Seamless Access to TSMC 3DFabric Technologies
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